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Research Manuscript: From Test to SLM Advanced Solutions
Session Chairs
Savita Banerjee
Meta
Jing-Jia Liou
DescriptionThis session covers a range of innovative solutions including, how to maximize the prediction accuracy for aging SRAMs; how to utilize machine learning in generating in-field self-test libraries; how to further optimize the performance of parallel fault simulation and test compaction; how to optimize the efficiency of NOCs under process variation; and how to improve the fault tolerance of the microfluidic MUXs.

Event TypeResearch Manuscript
TimeTuesday, June 241:30pm - 3:00pm PDT
Location3006, Level 3
Topics
EDA
Tracks
EDA9: Design for Test and Silicon Lifecycle Management
Presentations
1:30pm - 1:45pm PDTAsymmetric Predictive Testing for Aging in SRAMs
Authors
Yunkun Lin
Mingye li
Sandeep Gupta
1:45pm - 2:00pm PDTMachine Learning-Driven STL Generation for Enhancing Functional Safety of E/E Systems
Authors
Sanjay Das
Swastik Bhattacharya
Anand Menon
Shamik Kundu
Pooja Madhusoodhanan
Prasanth Viswanathan Pillai
Rubin Parekhji
Arnab Raha
Suvadeep Banerjee
Suriya Natarajan
Kanad Basu
2:00pm - 2:15pm PDTEPICS: Efficient Parallel Pattern Fault Simulation for Sequential Circuits via Strongly Connected Components
Authors
Mingjun Wang
Hui Wang
Jianan Mu
Xinyu Zhang
Bin Sun
Yihan Wen
Zizhen Liu
Feng Gu
Gao Jun
Shengwen Liang
Jing Ye
Xiaowei Li
Huawei Li
2:15pm - 2:30pm PDTPastATPG: A Hybrid ATPG Framework for Better Test Compaction with Partial Assignment SAT
Authors
Zhiteng Chao
xindi zhang
Xinyu Zhang
Jianan Mu
Zizhen Liu
Shengwen Liang
Shaowei Cai
Jing Ye
Xiaowei Li
Huawei Li
2:30pm - 2:45pm PDTProcess-Variation-Aware Design Optimization for Wavelength-Routed Optical Networks-on-Chip
Authors
Liaoyuan Cheng
Mengchu Li
Tsun-Ming Tseng
Martin Schottenloher
Ulf Schlichtmann
2:45pm - 3:00pm PDTFT-MUX: A Fault-Tolerant Microfluidic Multiplexer
Authors
Mengchu Li
Jiahui Peng
Tsun-Ming Tseng
Ulf Schlichtmann