Session
Back-end and System Considerations for Chiplets
Session Chair
DescriptionJoin us for a comprehensive session that explores the latest advancements in chiplet integration and 3DIC design, focusing on security, optimization, and thermal management, offering valuable insights into cutting-edge methodologies that enhance the reliability, efficiency, and performance of modern SoC and 3DIC systems. We start with a deep dive into secure chiplet integration within System-in-Package (SiP) architectures, detailing methods for secure authentication, remote attestation, and data protection through cryptographic techniques. Next, discover how to leverage machine learning to optimize heterogeneous 3DIC designs, significantly enhancing power, performance, and area (PPA) metrics through automated design space exploration. Explore SuperCoverage, an AI-guided approach that exponentially increases workload coverage for power and thermal analysis, ensuring accurate hot-spot temperature measurements crucial for dynamic power and thermal control. Learn about the complexities of Electrostatic Discharge (ESD) in multi-die systems, and learn how novel simulation tools can identify potential ESD vulnerabilities in 3DIC designs. This session will also cover advanced thermal simulation techniques for 3DIC packages with co-packaged optics, addressing thermal cross-talk and ensuring thermal integrity. Lastly, discover high-performance extraction methods for 2.5D/3D-IC packages, utilizing hybrid computational electromagnetic frameworks and machine learning to streamline the design process.
Event Type
Engineering Presentation
TimeMonday, June 233:30pm - 5:00pm PDT
Location2008, Level 2
AI
Systems and Software
Chiplet
Presentations
| 3:30pm - 3:45pm PDT | Securing Chiplet Integration: A System-in-Package Security Architecture. | |
| 3:45pm - 4:00pm PDT | Heterogenous 3DIC Partitioning with Cerebrus Machine Learning for PPA optimization | |
| 4:00pm - 4:15pm PDT | SuperCoverage: AI-Guided Full Coverage of Thermal and Power Analysis for SoC Design | |
| 4:15pm - 4:30pm PDT | Analysis of Electrostatic Discharge (ESD) for 3DIC systems | |
| 4:30pm - 4:45pm PDT | Accurate Thermal Simulation of 3DIC Package with Co-Packaged Optics | |
| 4:45pm - 5:00pm PDT | High Performance Extraction of 2.5D/3D-IC Package |


