Session
From Devices to Debug - Modeling Thoughtful Design Practices
Session Chair
DescriptionLearn from the smorgasboard skillset needed to dive deep into the world of devices to working devices that deliver impactful semiconductors cost effectively - from transistor devices, PDK and models to debugging parts and interconnect design
Event Type
Engineering Presentation
TimeTuesday, June 2410:30am - 12:00pm PDT
Location2012, Level 2
AI
Back-End Design
Presentations
| 10:30am - 10:45am PDT | Machine Learning (ML) Assisted IBIS-AMI Model for Optical Module Involved Advanced SerDes System Designs | |
| 10:45am - 11:00am PDT | Recalibration of MOSFET Compact Models based on Complex Product-Related Layouts using Bayesian Optimization | |
| 11:00am - 11:15am PDT | Enhancing PDK Library Validation with Machine Learning. A Novel Approach to Layout Comparison | |
| 11:15am - 11:30am PDT | A novel structure to achieve broadcastable IJTAG network | |
| 11:30am - 11:45am PDT | Generation of Failure Inspection Pattern without Design Impact during P&R in BSPDN Design | |
| 11:45am - 12:00pm PDT | MCP Induced Glitches |