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DTSTART:19700308T020000
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DTSTAMP:20260402T024532Z
LOCATION:3004\, Level 3
DTSTART;TZID=America/Los_Angeles:20250623T160000
DTEND;TZID=America/Los_Angeles:20250623T161500
UID:dac_DAC 2025_sess125_RESEARCH2412@linklings.com
SUMMARY:Efficient and Scalable Architectures for Multi-level Superconducti
 ng Qubit Readout
DESCRIPTION:Chaithanya Mude and Satvik Maurya (University of Wisconsin, Ma
 dison); Benjamin Lienhard (Princeton University); and Swamit Tannu (Univer
 sity of Wisconsin, Madison)\n\nRealizing the full potential of quantum com
 puting requires large-scale quantum computers capable of running quantum e
 rror correction (QEC) to mitigate hardware errors and maintain quantum dat
 a coherence. While quantum computers operate within a two-level computatio
 nal subspace, many processor modalities are inherently multi-level systems
 . This leads to occasional leakage into energy levels outside the computat
 ional subspace, complicating error detection and undermining QEC protocols
 . The problem is particularly severe in engineered qubit devices like supe
 rconducting transmons, a leading technology for fault-tolerant quantum com
 puting. Addressing this challenge requires effective multi-level quantum s
 ystem readout to identify and mitigate leakage errors. We propose a scalab
 le, high-fidelity three-level readout that reduces FPGA resource usage by 
 60x compared to the baseline while reducing readout time by 20%, enabling 
 faster leakage detection. By employing matched filters to detect relaxatio
 n and excitation error patterns and integrating a modular lightweight neur
 al network to correct crosstalk errors, the protocol significantly reduces
  hardware complexity, achieving a 100x reduction in neural network size. O
 ur design supports efficient, real-time implementation on off-the-shelf FP
 GAs, delivering a 6.6% relative improvement in readout accuracy over the b
 aseline. This innovation enables faster leakage mitigation, enhances QEC r
 eliability, and accelerates the path toward fault-tolerant quantum computi
 ng.\n\nTopics: Design\n\nTracks: DES6: Quantum Computing\n\nSession Chairs
 : Jinglei Cheng (University of Pittsburgh) and Himanshu Thapliyal (Univers
 ity of Tennessee)\n\n
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