BEGIN:VCALENDAR VERSION:2.0 PRODID:Linklings LLC BEGIN:VTIMEZONE TZID:America/Los_Angeles X-LIC-LOCATION:America/Los_Angeles BEGIN:DAYLIGHT TZOFFSETFROM:-0800 TZOFFSETTO:-0700 TZNAME:PDT DTSTART:19700308T020000 RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU END:DAYLIGHT BEGIN:STANDARD TZOFFSETFROM:-0700 TZOFFSETTO:-0800 TZNAME:PST DTSTART:19701101T020000 RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20260402T024505Z LOCATION:3001\, Level 3 DTSTART;TZID=America/Los_Angeles:20250625T153000 DTEND;TZID=America/Los_Angeles:20250625T173000 UID:dac_DAC 2025_sess132@linklings.com SUMMARY:Breaking Barriers: Compute-in-Memory for Transformer Acceleration DESCRIPTION:This session highlights groundbreaking innovations in Compute- in-Memory (CIM) architectures designed to accelerate large-scale transform er models and alleviate data transfer bottlenecks. It covers various optim ization strategies, from CIM-based solutions for attention computation in large language models (LLMs) to efficient memory management for long-conte xt inference. The session delves into software-hardware co-design techniqu es, including irregular attention sparsity, outlier-aware quantization, Mi xture-of-Experts (MoE) approaches, 3D hybrid bonding, and novel asynchrono us execution methods.\n\nSeIM: In-Memory Acceleration for Approximate Near est Neighbor Search\n\nApproximate nearest neighbor search (ANNS) is cruci al in many applications to find semantically similar matches for user quer ies. Especially with the development of large language models (LLMs), ANNS is becoming increasingly important in retrieval-augmented generation (RAG ) technique. An in-depth an...\n\n\nChaoqiang Liu (Huazhong University of Science and Technology), Dan Chen (National University of Singapore), Yu H uang (Huazhong University of Science and Technology), Wenjing Xiao (Guangx i University), Haifeng Liu and Yi Zhang (Huazhong University of Science an d Technology), Huize Li (National University of Singapore), and Xiaofei Li ao and Hai Jin (Huazhong University of Science and Technology)\n---------- -----------\nSplitSync: Bank Group-Level Split-Synchronization for High-Pe rformance DRAM PIM\n\nProcessing in Memory (PIM) architectures enhance mem ory bandwidth by utilizing bank-level parallelism, typically implemented w ith a SIMD structure where all banks operate simultaneously under a single command. \nHowever, this synchronous approach requires the activation of all banks before computatio...\n\n\nYoon Byungkuk, Sanghyeok Han, Gyeonghw an Park, and Jae-Joon Kim (Seoul National University)\n------------------- --\nPIMoE: Towards Efficient MoE Transformer Deployment on NPU-PIM System through Throttle-Aware Task Offloading\n\nMixture-of-experts (MoE) techniq ue holds significant promise for scaling up Transformer models. \nHowever, the data transfer overhead and imbalanced workload hinder efficient deplo yment.\nThis work presents PIMoE, a heterogeneous system combining process ing-in-memory (PIM) and neural-processing-unit (...\n\n\nLizhou Wu, Haozhe Zhu, Siqi He, Xuanda Lin, and Xiaoyang Zeng (State Key Lab of Integrated Chips and Systems, Fudan University) and Chixiao Chen (Fudan University)\n ---------------------\nDIAS: Distance-based Attention Sparsity for Ultra-L ong-Sequence Transformer with Tree-like Processing-in-Memory Architecture\ n\nLong-context inference has become a central focus in recent self-regres sive Transformer research. However, challenges still remain in performing decode stage due to the computational complexity of attention mechanisms a nd the substantial overhead associated with KV cache storage. Although att ention ...\n\n\nZekai Chen, Yiming Chen, Teng Wan, Tianyi Yu, Yu Wang, Hua zhong Yang, and Xueqing Li (Tsinghua University)\n---------------------\nA ttenPIM: Accelerating LLM Attention with Dual-mode GEMV in Processing-in-M emory\n\nLarge Language Models (LLMs) have demonstrated unprecedented gene rative performance across a wide range of applications. While recent heter ogeneous architectures attempt to address the memory-bound bottleneck from attention computations by processing-in-memory (PIM) offloading, they ove rlook two cri...\n\n\nLiyan Chen, Dongxu Lyu, Zhenyu Li, Jianfei Jiang, Qi n Wang, Zhigang Mao, and Naifeng Jing (Shanghai Jiao Tong University)\n--- ------------------\nNear-Memory LLM Inference Processor based on 3D DRAM-t o-logic Hybrid Bonding\n\nLarge language model (LLM) inference poses dual challenges, demanding substantial memory bandwidth and computing resources . Recent advancements in near-memory accelerators leveraging 3D DRAM-to-lo gic hybrid-bonding (HB) interconnects have gained attention due to their h ighly parallel data transfer c...\n\n\nSanghyeok Han, Yoon Byungkuk, and G yeonghwan Park (Seoul National University); Choungki Song and Dongkyun Kim (SK hynix); and Jae-Joon Kim (Seoul National University)\n--------------- ------\nOutlierCIM: Outlier-Aware Digital CIM-Based LLM Accelerator with H ybrid-Strategy Quantization and Unified FP-INT Computation\n\nActivation o utliers in Large Language Models (LLMs), which exhibit large magnitudes bu t small quantities, significantly affect model performance and pose challe nges for the acceleration of LLMs. To address this bottleneck, researchers have proposed several co-design frameworks with outlier-aware alg...\n\n\ nZihan Zou, Shikuang Chen, Chen Zhang, Xing Wang, Zhichao Liu, Haoran Du, Xin Si, Hao Cai, and Bo Liu (Southeast University)\n---------------------\ nSupporting Register-based Addressing Modes for in-DRAM PIM ISAs\n\nProces sing-in-Memory architecture presents a promising solution to alleviate the data movement bottleneck that arises from transferring data between memor y and compute units in traditional processor-centric systems, particularly for DNN applications. However, this architecture introduces two inheren.. .\n\n\nSeok Young Kim and Byung Ho Choi (Korea University), Seokwon Kang a nd Yongjun Park (Yonsei University), and Seon Kim (Korea University)\n\nTo pics: Design\n\nTracks: DES2B: In-memory and Near-memory Computing Archite ctures, Applications and Systems\n\nSession Chairs: Steve Dai (NVIDIA) and Haitong Li (Purdue University) END:VEVENT END:VCALENDAR