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DTSTAMP:20260402T024534Z
LOCATION:3001\, Level 3
DTSTART;TZID=America/Los_Angeles:20250625T163000
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UID:dac_DAC 2025_sess132_RESEARCH728@linklings.com
SUMMARY:Supporting Register-based Addressing Modes for in-DRAM PIM ISAs
DESCRIPTION:Seok Young Kim and Byung Ho Choi (Korea University), Seokwon K
 ang and Yongjun Park (Yonsei University), and Seon Kim (Korea University)\
 n\nProcessing-in-Memory architecture presents a promising solution to alle
 viate the data movement bottleneck that arises from transferring data betw
 een memory and compute units in traditional processor-centric systems, par
 ticularly for DNN applications. However, this architecture introduces two 
 inherent overheads: PIM code offloading and data transferring between CPU 
 and memory. To address these issues, we propose two register-based address
 ing modes, indexed and base-offset addressing, for DMA descriptor-based in
 -DRAM PIM ISAs. Our full-system performance evaluation demonstrates that t
 he approach significantly reduces the overheads, resulting in up to 1.94x 
 speedup compared to the baseline PIM, additionally only with 4.65% area an
 d 8.61% power consumption.\n\nTopics: Design\n\nTracks: DES2B: In-memory a
 nd Near-memory Computing Architectures, Applications and Systems\n\nSessio
 n Chairs: Steve Dai (NVIDIA) and Haitong Li (Purdue University)\n\n
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