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DTSTAMP:20260402T024534Z
LOCATION:3002\, Level 3
DTSTART;TZID=America/Los_Angeles:20250625T143000
DTEND;TZID=America/Los_Angeles:20250625T144500
UID:dac_DAC 2025_sess133_RESEARCH1718@linklings.com
SUMMARY:Efficient Weight Mapping and Resource Scheduling on Crossbar-based
  Multi-core CIM Systems
DESCRIPTION:Hanjie Liu and Sifan Sun (Beihang University); Aifei zhang (Zh
 icun Research Lab); Haiyan Qin (Beihang University); Yutong Wu, Minhao Gu,
  Shihang Fu, Shuaikai Liu, and Baosen Liu (Zhicun Research Lab); and Wang 
 Kang (Beihang University)\n\nCrossbar-based computing-in-memory (CIM) syst
 ems facilitate large-scale parallel multiply-and-accumulate (MAC) operatio
 ns, while a domain-specific compiler (DSC) plays a pivotal role in optimiz
 ing the deployment of neural network algorithms on such systems. With the 
 development of multi-core and large-core architectures, some key compiler 
 problems such as high parallel processing, resource utilization, and cross
 bar array assignment methods have not been solved. For low-latency applica
 tion scenarios, we have designed a resource scheduling strategy for our ha
 rdware system based on stream data processing to reduce the latency caused
  by intra-core and inter-core communication. Additionally, a weight mappin
 g strategy has been developed to maximize the potential of crossbar arrays
  in convolutional neural networks (CNNs) deployment. Experimental results 
 on our multi-core eFlash-based CIM system-on-chip (SoC) demonstrate that t
 hese two technologies help CNNs achieve a 76% reduction in latency, a 30% 
 improvement in resource utilization, and the use rate of crossbar array th
 at can reach up to 94.7%.\n\nTopics: Design\n\nTracks: DES2B: In-memory an
 d Near-memory Computing Architectures, Applications and Systems\n\nSession
  Chairs: Shaahin Angizi (New Jersey Institute of Technology) and Dinesh So
 masekhar\n\n
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