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DTSTAMP:20260402T024534Z
LOCATION:3004\, Level 3
DTSTART;TZID=America/Los_Angeles:20250625T143000
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UID:dac_DAC 2025_sess136_RESEARCH1105@linklings.com
SUMMARY:ADVISOR: Approximate Computing-frienDly High-LeVel Synthesis DesIg
 n Space ExplORer
DESCRIPTION:Baharealsadat Parchamdar and Benjamin Carrion Schaefer (The Un
 iversity of Texas at Dallas)\n\nApproximate computing is a relatively new 
 computing paradigm that allows to trade-off area/power with the accuracy a
 t the outputs. Another relatively new VLSI design trend is to raise the le
 vel of design abstraction from the Register-Transfer Level (RTL) to the be
 havioral level and use High-Level Synthesis (HLS) to synthesize these beha
 vioral descriptions. HLS has one unique advantage over RT-level design. It
  completely decouples the functional description from the implementation. 
 This allows to design and verify the behavioral description once,\nbut the
 n generate a large number of hardware implementations of unique area vs. p
 erformance trade-offs. This is typically achieved through synthesis direct
 ives in the form of pragmas that the HLS user annotates at the source code
  to mainly control how to synthesize arrays (RAM, registers, expand), loop
 s (unroll, pipeline) and functions (inline or not).\n In this work we leve
 rage this uniqueness and build an automated HLS design space explorer to f
 ind the hardware circuit most amenable to approximate computing, this is, 
 has the highest potential for area/power savings. We have coined this expl
 orer ADVISOR. The main problem with traditional exploration processes is t
 hat their long run time, which is even more accentuated in this case becau
 se every new implementation needs to be fully approximated to fully unders
 tand the trade-offs in terms of area/power vs. error of each design. Thus,
  in order\nto accelerate this exploration process, we propose to evaluate 
 each new designs based on an Approximation Friendliness Index (AFI) that c
 an be computed statically, very fast, and only fully approximate the desig
 ns recommended by our flow that have high AFI values. Experimental results
  show that this approach leads to basically the same results as exhaustive
 ly approximating every new design, while being on average 68× faster.\n\nT
 opics: EDA\n\nTracks: EDA5: RTL/Logic Level and High-level Synthesis\n\nSe
 ssion Chairs: Aman Gayasen (Advanced Micro Devices (AMD)) and Christian Pi
 lato (Politecnico di Milano)\n\n
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