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DTSTAMP:20260402T024533Z
LOCATION:DAC Pavilion\, Level 2 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20250624T130000
DTEND;TZID=America/Los_Angeles:20250624T134500
UID:dac_DAC 2025_sess201_ST101@linklings.com
SUMMARY:New Innovation Frontier with Large Language Models for SoC Securit
 y
DESCRIPTION:Mark Tehranipoor (University of Florida, Caspia Technologies)\
 n\nAs complex SoCs become prevalent in virtually all systems, these device
 s also present a primary attack surface. The risks of cyberattacks are rea
 l, and AI is making them more sophisticated. As we also deploy AI into the
  SoC design process, it is imperative that secure design practices are inc
 orporated as well. \n\nExisting security solutions are inadequate to provi
 de effective verification of complex SoC designs due to their limitations 
 in scalability, comprehensiveness, and adaptability. Large Language Models
  (LLMs) are celebrated for their remarkable success in natural language un
 derstanding, advanced reasoning, and program synthesis tasks. \n\nRecogniz
 ing this opportunity, we propose leveraging the emergent capabilities of G
 enerative Pre-trained Transformers (GPTs) to address the existing gaps in 
 SoC security, aiming for a more efficient, scalable, and adaptable methodo
 logy. In this presentation we offer an in-depth analysis of existing work,
  showcasing achievements, prospects, and challenges of employing LLMs in S
 oC security design and verification tasks.\n\n
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