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DTSTAMP:20260402T024533Z
LOCATION:2008\, Level 2
DTSTART;TZID=America/Los_Angeles:20250623T153000
DTEND;TZID=America/Los_Angeles:20250623T154500
UID:dac_DAC 2025_sess215_ENGPRES124@linklings.com
SUMMARY:Securing Chiplet Integration: A System-in-Package Security Archite
 cture.
DESCRIPTION:Sylvain Guilley (Secure-IC) and Junie Um (Cadence Design Syste
 ms, Inc.)\n\nChiplets enable a new design methodology where monolithic Sys
 tem-on-Chips (SoCs) are disaggregated into several chip(let)s integrated t
 ogether within a System-in-Package (SiP).\n\nThe ultimate achievement in t
 his respect is the ability to mix and match heterogeneous chiplets (in dif
 ferent technologies, but most importantly from different vendors). For thi
 s vision to happen, it is required that the different chiplets can securel
 y authenticate together and subsequently ensure trustworthy services. This
  results in three security functions: chiplets hardware bill of material (
 HBOM) mutual verification, chiplets software bill of material (SBOM) aggre
 gation, verification and reporting (together referred to as "remote attest
 ation"), and key management / payload isolation by cryptography (together 
 referred to as "data protection").\n\nThese three functions can leverage k
 nown protocols, typically implemented in software. But to run properly, th
 ey require the preliminary creation of dedicated key pairs allocated for s
 ecurity services in each chiplet. This occurs at hardware level, ideally w
 ithin a root of trust (which can leverage injected keys or intrinsic keys,
  diversified from a PUF).\n\nThis presentation will cover the different en
 rollment steps (hierarchy of certificates, chained in a PKI) throughout li
 fecycle. We'll detail as well the challenge of key renewal, after compromi
 ssion or expiration of their crypto-period, transitioning to post-quantum 
 cryptography, etc.\n\nAltogether this approach allows to formalize the sec
 urity problem and inventory the underlying assets. It stems from a prelimi
 nary protection profile (PP) that will be disclosed and made available for
  comments. The version 1.0 of the PP is due in June 2025.\n\nTopics: AI, S
 ystems and Software, Chiplet\n\nSession Chair: Frank Schirrmeister (Synops
 ys)\n\n
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