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DTSTART:19700308T020000
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BEGIN:VEVENT
DTSTAMP:20260402T024533Z
LOCATION:2010\, Level 2
DTSTART;TZID=America/Los_Angeles:20250623T144500
DTEND;TZID=America/Los_Angeles:20250623T150000
UID:dac_DAC 2025_sess221_ENGPRES350@linklings.com
SUMMARY:AI-aided flow for digital verification of a multiprotocol SerDes P
 HY
DESCRIPTION:Celso Figueiredo and Domingos Terra (Synopsys)\n\nThis work de
 scribes the development and implementation of a verification flow that is 
 aided by Artificial Intelligence (AI), supported by Synopsys VSO.ai.  A co
 mparative analysis was made between the conventional and the developed flo
 w, on the verification of a multiprotocol SerDes PHY. \nCoverage closure i
 s fundamental in verification flows, despite being a resource-heavy task. 
 Synopsys VSO.ai is a developing verification technology, based on AI, made
  to accelerate constraint-random and coverage-driven testbenches.\nThis is
  of special importance in automotive projects where the required high qual
 ity of coverage metrics demands a complete analysis of both code and funct
 ional coverage. Adding AI in the verification flow contributes to reducing
  Time To Results (TTR), to an easier identification of corner cases, to id
 entify redundancies and missing coverage definition within the testbench a
 nd to the achievement of full coverage closure in a shorter time.\nWith th
 e introduction of the AI-aided flow, a productivity boost was observed in 
 comparison to the conventional regression flow, namely in reducing the req
 uired number of simulations and total regression time by a factor of 3 and
  2, respectively. Such benefits provide the verification engineers increas
 ed flexibility in their allocation to debugging tasks.\n\nTopics: AI, IP, 
 Chiplet\n\nSession Chair: Shankar Hemmady (Micron Technology)\n\n
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