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BEGIN:VEVENT
DTSTAMP:20260402T024532Z
LOCATION:2012\, Level 2
DTSTART;TZID=America/Los_Angeles:20250624T134500
DTEND;TZID=America/Los_Angeles:20250624T140000
UID:dac_DAC 2025_sess225_ENGPRES074@linklings.com
SUMMARY:ML based PPA Push using XAI
DESCRIPTION:Kyoungsun Cho, Mintae Lee, jungho kim, Sungyoul Seo, Kibum Nam
 , Bonghyun Lee, and Ki-Ok Kim (Samsung)\n\nAs the technology node scales d
 own continuously, the complexity of the chip design has increased. The ele
 ctronic design automation (EDA) tools also need to be flexible to handle t
 he design complexity. \nAdvanced EDA tools offer numerous tunable paramete
 rs that can greatly affect physical design quality.\nAs the demand to achi
 eve improved results (time to market) faster is growing, physical engineer
  face challenges that are impossible to keep pace with conventional approa
 ches taking months to manually tune parameters with hundreds of trials.Mor
 eover, even if engineers manage to find the best recipe through vast desig
 n space exploration for a given design, it is likely to be a one-time solu
 tion that is difficult to apply to another design unless the influence of 
 various parameters cannot be understood sufficiently.\nTherefore, we propo
 se an ML based PPA push work flow using XAI which not only obtains the gol
 den recipe for a given design, but also understands the influence of the p
 arameters used.\n\nTopics: AI, Back-End Design\n\nSession Chair: Patricia 
 Fong (Marvell Semiconductor)\n\n
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