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TZNAME:PDT
DTSTART:19700308T020000
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DTSTART:19701101T020000
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BEGIN:VEVENT
DTSTAMP:20260402T024534Z
LOCATION:2012\, Level 2
DTSTART;TZID=America/Los_Angeles:20250624T140000
DTEND;TZID=America/Los_Angeles:20250624T141500
UID:dac_DAC 2025_sess225_ENGPRES140@linklings.com
SUMMARY:Routing Congestion Mitigation Techniques Targeting Dense Designs
DESCRIPTION:nancy Zhou (IBM); Lakshmi Reddy (IBM Research); and Alex Suess
 , Bijian Chen, and Nathaniel Hieter (IBM)\n\nChallenging high performance 
 design schedules with competitive PPA targets may lead to congested or unr
 outeable designs during EDA backend process. To address these challenges, 
 we propose multiple novel routing congestion mitigation methods including:
  (1) finer integration of estimated global routing congestion based cell s
 preading method into optimization flows to mitigate congestion (2) increme
 ntal routing based cell movement transformation to further mitigate conges
 tion, (3) temporary removal of polarity inverters to eliminate their influ
 ence on cell placement & reduce congestion. Proposed enhancements showed u
 p to 3% congestion reduction on high performance industrial designs leadin
 g to their expedited adoption by our design teams. They turned several ini
 tially unrouteable dense designs routable, and our optimization steps have
  gone from typically increasing congestion to decreasing congestion!\n\nTo
 pics: AI, Back-End Design\n\nSession Chair: Patricia Fong (Marvell Semicon
 ductor)\n\n
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