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DTSTAMP:20260402T024534Z
LOCATION:2012\, Level 2
DTSTART;TZID=America/Los_Angeles:20250624T144500
DTEND;TZID=America/Los_Angeles:20250624T150000
UID:dac_DAC 2025_sess225_ENGPRES287@linklings.com
SUMMARY:Dynamic Optimization of Skew Balancing through an Innovative Corre
 ct-by-Construct Path Delay Query Technique
DESCRIPTION:Tejas Salunkhe, Subhadeep Aich, and Abhranil Bose (Texas Instr
 uments)\n\nSkew- the timing variation among signals, can severely impact t
 he performance and functionality of complex design systems, if not taken c
 are of appropriately. Traditional skew minimization techniques often focus
  on individual signals and consider one signal as reference leading to sub
 -optimal results when dealing with a large number of inter-related signals
 , especially in Mixed Signal designs. Traditional techniques are more post
 -facto and hence iterative\nThis paper introduces a novel "correct-by-cons
 truct" approach for skew balancing across multiple signals in Mixed-signal
  SoCs. Mixed-signal SoCs combine analog and digital components, presenting
  unique challenges in achieving precise timing synchronization. \nOur prop
 osed methodology leverages "correct-by-construct" optimization strategies 
 to address the timing paths of multiple signals within a design, thus redu
 cing global skew and minimizing congestion in the digital-analog interface
  channels. The solution therefore ensures first pass STA timing closure ev
 en for complex skew requirements across PVT corners enabling early SDF han
 doff. This in turn ensures faster time to market, avoids any late design/s
 pec changes and signoff timing distortion. This method is also beneficial 
 for multi-core processor designs such as Processors designs where bus skew
  balance is critical.\nIn summary, this comprehensive methodology offers a
  valuable tool for designers to meet complex timing requirements and enhan
 ce the reliability of interface timing in an era of increasing complexity 
 and miniaturization.\n\nTopics: AI, Back-End Design\n\nSession Chair: Patr
 icia Fong (Marvell Semiconductor)\n\n
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