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DTSTART:19700308T020000
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BEGIN:VEVENT
DTSTAMP:20260402T024534Z
LOCATION:2012\, Level 2
DTSTART;TZID=America/Los_Angeles:20250624T162400
DTEND;TZID=America/Los_Angeles:20250624T164200
UID:dac_DAC 2025_sess226_ENGPRES044@linklings.com
SUMMARY:PPA Evaluation of BS-PDN Compared to FS-PDN in the Early Stage
DESCRIPTION:Dean Huang, Andy Wei, Chee How Lim, and Yi-Wei Chen (Intel Cor
 poration)\n\nFS-PDN: (Traditional Power Delivery Network) is used to deliv
 er power to silicon mos device, implemented by metal routing and via conne
 ction from bump to device. BS-PDN: (Advanced PDN) moves those PDN to the b
 ackside of silicon substrate and free the routing resource to signal routi
 ng and provide a lower resistance PDN to deliver power to silicon. It is c
 ritical to get the Power Performance Area and IR drop improvement numbers 
 for process node selection or process DTCO. This work provide a methodolog
 y and case study to evaluate PPA and IR drop gain at early stage while BSP
 DN PDK and EDA flow is not 100% ready.\n\nTopics: Back-End Design, Chiplet
 \n\nSession Chair: Amol Joshi (Intel Corporation)\n\n
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