BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
X-LIC-LOCATION:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
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BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
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BEGIN:VEVENT
DTSTAMP:20260402T024532Z
LOCATION:2008\, Level 2
DTSTART;TZID=America/Los_Angeles:20250624T103000
DTEND;TZID=America/Los_Angeles:20250624T120000
UID:dac_DAC 2025_sess236_ENGINV109@linklings.com
SUMMARY:AI-Enabled EDA for Chip Design
DESCRIPTION:Predrag Nikolic (Veriest Solutions Ltd.); Kartik Hegde (ChipSt
 ack, Inc.); Akash Levy (Silimate, Inc.); Badru Agarwala (Rise Design Autom
 ation, Inc.); William Wang (ChipAgents.ai); Sandeep Srinivasan (VerifAI); 
 Jeffrey Pan (Bronco AI); and Madhulima Tewari (Verifaix)\n\nArtificial Int
 elligence is revolutionizing Electronic Design Automation (EDA), accelerat
 ing innovation in chip design and verification. This panel brings together
  seven technical experts - each a co-founder of their company - who are pi
 oneering AI-driven solutions to tackle today's most complex semiconductor 
 challenges. From automating circuit optimization to enhancing verification
  efficiency, our panelists will showcase cutting-edge tools that push the 
 boundaries of performance, accuracy, and scalability. Attendees will gain 
 deep technical insights into real-world AI applications in EDA, uncovering
  how machine learning is reshaping the design flow and redefining engineer
 ing productivity. Whether you're a design engineer, verification specialis
 t, or EDA technology strategist, this discussion will provide valuable per
 spectives on the future of AI in semiconductor design.\n\nTopics: AI, Fron
 t-End Design\n\n
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