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DTSTAMP:20260402T024533Z
LOCATION:3010\, Level 3
DTSTART;TZID=America/Los_Angeles:20250623T133000
DTEND;TZID=America/Los_Angeles:20250623T140000
UID:dac_DAC 2025_sess256_SSSN029@linklings.com
SUMMARY:Co-design of Quantum Processors for NISQ Applications
DESCRIPTION:John Gamble (IONQ)\n\nWithin the noisy intermediate-scale quan
 tum (NISQ) regime, quantum computers have the potential to\nperform tasks 
 that cannot be achieved on classical hardware. A logical question to ask i
 s how the architecture and design of quantum information processors impact
 s their effectiveness to address problems of interest. In some architectur
 es, such as those with atomic qubits, qubits are not fixed in space, but c
 an instead by dynamically reconfigured. Using this architectural flexibili
 ty, we explore the co-design of trapped-ion quantum computers with NISQ ap
 plications. By incorporating quantum error correction strategies and condu
 cting detailed performance and resource estimations, we show that architec
 tural decisions are impactful for practical utility, even when component p
 erformance metrics such as gate fidelity and speed remain fixed.\n\nTopics
 : Design\n\nSession Chairs: Fan Chen (Indiana University, Bloomington) and
  Samah Saeed (City University of New York, City College)\n\n
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