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DTSTAMP:20260402T024534Z
LOCATION:Level 3 Lobby
DTSTART;TZID=America/Los_Angeles:20250622T180000
DTEND;TZID=America/Los_Angeles:20250622T190000
UID:dac_DAC 2025_sess261_RESEARCH1477@linklings.com
SUMMARY:IM-DSE: Intelligent Muti-target Design Space Exploration for BNN A
 ccelerators in FPGAs
DESCRIPTION:Qianyi Chen, Lu Wang, Xia Zhao, Guangda Zhang, and Huadong Dai
  (Academy of Military Science)\n\nBinary Neural Networks (BNNs) are highly
  effective for image classification and recognition tasks, particularly on
  power-constrained FPGAs, which are commonly deployed on edge platforms. T
 he FINN framework, a widely used solution, leverages a streaming architect
 ure and a set of novel optimizations to map BNNs onto FPGAs efficiently. H
 owever, its design space exploration capabilities remain limited, often le
 ading to suboptimal configurations. To address this, we propose the IM-DSE
  strategy, a novel multi-target design exploration framework. IM-DSE intro
 duces a multi-objective optimization scheme to identify superior design po
 ints by constraining both throughput and Look-Up Table (LUT) consumption. 
 It incorporates an accurate LUT model and a Transferring-Computation (TC) 
 model, which predict LUT usage and processing cycles as functions of the n
 umber of SIMDs and PEs per layer. Additionally, IM-DSE employs an intellig
 ent search strategy to efficiently explore optimal accelerator configurati
 ons under given constraints. Experimental results demonstrate that, at a t
 arget cycle of 1000, IM-DSE achieves an average improvement of 61.72% (up 
 to 87.67%) in energy efficiency and 60.05% (up to 84.42%) in LUT utilizati
 on efficiency (FPS/LUT) compared to the state-of-the-art FINN framework ac
 ross varying LUT constraints.\n\nTracks: DES5: Emerging Device and Interco
 nnect Technologies\n\n
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