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DTSTART;TZID=America/Los_Angeles:20250622T180000
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UID:dac_DAC 2025_sess261_RESEARCH1982@linklings.com
SUMMARY:MPE : A Power-Efficient Edge-Device Mamba Processor with Multi-Dim
 ensional Calculation-Compression Scheme
DESCRIPTION:Zhou Wang (Imperial College London); Haochen Du (Hong Kong Uni
 versity of Science and Technology (HKUST)); Xiaonan Tang (Beijing Wisemay 
 Science and Technology Co.,LTD); Shushan Qiao (Institute of Microelectroni
 cs, Chinese Academy of Sciences); Shouyi Yin (Tsinghua University); and An
 il Bharath and Manos Drakakis (Imperial College London)\n\nAs one of the m
 ost representative AI technologies, the Mamba architecture has enabled man
 y advanced models. This paper proposes an energy-efficient Mamba inference
  processor, called the Mamba Processing Element (MPE). Firstly, MPE uses t
 he recurrent framework  to find Low-correlation Assignment Pruning Optimiz
 ation (LAPO) schemes; Secondly, MTPE uses the mechanism of Spatial Multi-h
 ead Attention Similarity (SMAS); Thirdly, MPE designs a Dynamic Parallel C
 ompression Quantization (DPCQ) architecture. Using 28nm CMOS synthesis too
 ls, the proposed STPE processor has an area of 9.14 mm2 and a peak energy 
 efficiency of 93.51TOPS/W, which is 16.3 times that of the H100 graphics p
 rocessing unit (GPU).\n\nTracks: DES5: Emerging Device and Interconnect Te
 chnologies\n\n
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