BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
X-LIC-LOCATION:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20250625T183020Z
LOCATION:Engineering Posters\, Level 2 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20250623T170000
DTEND;TZID=America/Los_Angeles:20250623T180000
UID:dac_DAC 2025_sess263_ENGPOST276@linklings.com
SUMMARY:Leveraging Machine Learning to Automate Waiver Generation for Stat
 ic Lint Violations
DESCRIPTION:Mohan Mangal, Himanshu Kathuria, and Jaskaran Ajimal (Synopsys
 )\n\nModern static linting tools are indispensable for ensuring high-quali
 ty RTL designs by identifying syntactic, structural, and coding-style issu
 es. However, these tools often generate an overwhelming number of violatio
 ns, many of which are false positives that require manual filtering and wa
 iver creation. This time-consuming process not only burdens RTL designers 
 but also introduces risk of human error. In response, we propose a novel M
 achine Learning (ML) based framework that automatically learns from histor
 ically waived violations and applies similar waivers to newly flagged issu
 es. By representing RTL snippets and violations as graph structures, we em
 ploy Graph Convolution Networks (GCNs) and similarity-compute (Graph2Vec) 
 techniques to identify patterns that warrant waiver recommendations. Exper
 imental results show high accuracy and recall in predicting new waivers, a
 s well as substantial time savings and productivity gains. This approach s
 ignificantly reduces the manual effort required to handle static lint outp
 uts and paves the way for more intelligent and scalable verification flows
  in the semiconductor design process.\n\n
END:VEVENT
END:VCALENDAR