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BEGIN:VEVENT
DTSTAMP:20260402T024532Z
LOCATION:Engineering Posters\, Level 2 Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20250625T121500
DTEND;TZID=America/Los_Angeles:20250625T131500
UID:dac_DAC 2025_sess265_ENGPOST113@linklings.com
SUMMARY:Contemporary PPAS Optimization Strategies in Physical Implementati
 on of Digital SoCs – A Case Study
DESCRIPTION:Sukhmani Virk, UTKARSHA SUMAN, Ben Thomas, Megha Mendu, Murtaz
 a Tankiwala, and Kavithaa rajagopalan (Texas Instruments)\n\nToday, System
  on Chip (SoC) devices have stringent Power, Performance, Area and Schedul
 e (PPAS) requirements. With the increase in design size and complexity, st
 andard techniques and flow-options provided by state-of-the-art Placement 
 and Routing (PnR) tools often prove to be ineffective. It is really import
 ant to have better design approach and optimization techniques while consi
 dering signoff constraint on timing closure and physical verification.\nWi
 th each design revision there is a push to improve on the PPAS met by the 
 previous generation. Although design related changes are the most effectiv
 e for this, beyond a point to get the maximum out of a technology, we need
  to look at novel and automated strategies that can be used in physical de
 sign implementation. \nIn this paper, we are exploiting various methodolog
 ies and optimization techniques which can be used across different impleme
 ntation stages of physical design cycle. We demonstrate end-to-end impleme
 ntation of various optimization techniques for Turn-Around-Time (TAT) impr
 ovement, without any impact to Quality-of-Results (QOR). We also present a
  deep dive analysis of a novel solution to the primitive problem of multip
 le iterations required to close timing for Source Synchronous IO Interface
 s. \nIn this paper, we will discuss about the correlation issues which are
  prevalent among implementation and sign-off techniques and the various me
 thodologies that can help in reducing this miscorrelation which in turn ca
 n lead to PPAS improvements.\n\n
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