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DTSTAMP:20260402T024532Z
LOCATION:Level 2 Lobby
DTSTART;TZID=America/Los_Angeles:20250623T180000
DTEND;TZID=America/Los_Angeles:20250623T190000
UID:dac_DAC 2025_sess287_LBR107@linklings.com
SUMMARY:Late Breaking Results: A Geometric Diffusion Model for Macro Place
 ment Generation
DESCRIPTION:Jongho Yoon (Pohang University of Science and Technology (POST
 ECH)); Jinsung Jeon (University of California, San Diego); and Seokhyeong 
 Kang (Pohang University of Science and Technology (POSTECH))\n\nMacro plac
 ement is crucial in VLSI design, directly impacting circuit performance. W
 e introduce MacroDiff, a diffusion-based macro placement generative model 
 that captures wirelength relationships instead of directly predicting macr
 o coordinates. By leveraging wirelength as an intermediate representation,
  MacroDiff naturally preserves circuit connectivity, reduces placement con
 straints, and enhances solution flexibility while inherently handling rota
 tional and translational invariances. Experiments on ISPD2005 benchmarks s
 how that MacroDiff reduces macro overlap by 91.6%, lowers macro legalizati
 on displacement by 74.4%, and improves half-perimeter wirelength (HPWL) by
  7.0%. While maintaining the efficiency of generative approaches, MacroDif
 f generates high-quality placements more reliably, narrowing the gap with 
 state-of-the-art methods. The source code for this work is available at ht
 tps://anonymous.4open.science/r/MacroDiff-E806.\n\n
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