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DTSTART:19700308T020000
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DTSTAMP:20260402T024533Z
LOCATION:Level 2 Lobby
DTSTART;TZID=America/Los_Angeles:20250623T180000
DTEND;TZID=America/Los_Angeles:20250623T190000
UID:dac_DAC 2025_sess287_LBR121@linklings.com
SUMMARY:Late Breaking Results: FPGen-3D: Automated Framework for 3D-FPGA A
 rchitecture Generation and Exploration
DESCRIPTION:Ismael Youssef and Cong "Callie" Hao (Georgia Institute of Tec
 hnology)\n\nIn this work, we propose FPGen-3D, an automated framework for 
 3D field-programmable gate arrays (FPGA) architecture generation and explo
 ration. FPGen-3D generates custom 3D FPGA fabrics based on user-defined ar
 chitectural parameters, producing synthesizable register-transfer level (R
 TL) code, routing results, and programming bitstreams, enabling efficient 
 navigation of the 3D FPGA design space. We demonstrate its capabilities th
 rough a case study of generating and exploring various vertical connection
  strategies via 3D switch blocks (SB) and 3D configurable logic block (CLB
 ). Results show that 3D FPGAs can achieve lower wire length than tradition
 al 2D FPGAs with a decrease of up to 18.5%.\n\n
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