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DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
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DTSTAMP:20260402T024534Z
LOCATION:Level 2 Lobby
DTSTART;TZID=America/Los_Angeles:20250623T180000
DTEND;TZID=America/Los_Angeles:20250623T190000
UID:dac_DAC 2025_sess287_LBR125@linklings.com
SUMMARY:Late Breaking Results: Versatile 4:1 Multiplexer Using 1T1R RRAM C
 rossbar for High Speed In-Memory Computing
DESCRIPTION:Vinod Kumar and Binsu Kailath (Indian Institute of Information
  Technology Design and Manufacturing Kancheepuram)\n\nThis paper presents 
 a high speed NAND based 4:1 Multiplexer (MUX) for various logic operations
  in a Resistive-Random access memory crossbar structure. Compared to exist
 ing 4:1 MUX designs that require 10 steps, our proposed method completes e
 xecution in 3 steps. Additionally, proposed 4:1 MUX\nbased Full adder, Ful
 l subtractor and 1-bit Comparator reduce clock cycles by 75% compared to s
 tate-of-the-art. Despite an increase in memristor count, the reduction in 
 computational delay makes this approach promising for fast in-memory compu
 ting.\n\n
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